1pub fn disassemble(opcode: u8) -> &'static str {
2    match opcode {
3        0x00 => "BRK",
4        0x01 => "ORA (zp,X)",
5        0x02 => "SXY",
6        0x03 => "ST0",
7        0x04 => "TSB zp",
8        0x05 => "ORA zp",
9        0x06 => "ASL zp",
10        0x07 | 0x17 | 0x27 | 0x37 | 0x47 | 0x57 | 0x67 | 0x77 => {
11            ["RMB0", "RMB1", "RMB2", "RMB3", "RMB4", "RMB5", "RMB6", "RMB7"][(opcode >> 4) as usize]
12        }
13        0x08 => "PHP",
14        0x09 => "ORA #imm",
15        0x0A => "ASL A",
16        0x0C => "TSB abs",
17        0x0D => "ORA abs",
18        0x0E => "ASL abs",
19        0x0F | 0x1F | 0x2F | 0x3F | 0x4F | 0x5F | 0x6F | 0x7F => {
20            ["BBR0", "BBR1", "BBR2", "BBR3", "BBR4", "BBR5", "BBR6", "BBR7"][(opcode >> 4) as usize]
21        }
22        0x10 => "BPL",
23        0x11 => "ORA (zp),Y",
24        0x12 => "ORA (zp)",
25        0x13 => "ST1",
26        0x14 => "TRB zp",
27        0x15 => "ORA zp,X",
28        0x16 => "ASL zp,X",
29        0x18 => "CLC",
30        0x19 => "ORA abs,Y",
31        0x1A => "INC A",
32        0x1C => "TRB abs",
33        0x1D => "ORA abs,X",
34        0x1E => "ASL abs,X",
35        0x20 => "JSR",
36        0x21 => "AND (zp,X)",
37        0x22 => "SAX",
38        0x23 => "ST2",
39        0x24 => "BIT zp",
40        0x25 => "AND zp",
41        0x26 => "ROL zp",
42        0x28 => "PLP",
43        0x29 => "AND #imm",
44        0x2A => "ROL A",
45        0x2C => "BIT abs",
46        0x2D => "AND abs",
47        0x2E => "ROL abs",
48        0x30 => "BMI",
49        0x31 => "AND (zp),Y",
50        0x32 => "AND (zp)",
51        0x34 => "BIT zp,X",
52        0x35 => "AND zp,X",
53        0x36 => "ROL zp,X",
54        0x38 => "SEC",
55        0x39 => "AND abs,Y",
56        0x3A => "DEC A",
57        0x3C => "BIT abs,X",
58        0x3D => "AND abs,X",
59        0x3E => "ROL abs,X",
60        0x40 => "RTI",
61        0x41 => "EOR (zp,X)",
62        0x42 => "SAY",
63        0x43 => "TMA",
64        0x44 => "BSR",
65        0x45 => "EOR zp",
66        0x46 => "LSR zp",
67        0x48 => "PHA",
68        0x49 => "EOR #imm",
69        0x4A => "LSR A",
70        0x4C => "JMP abs",
71        0x4D => "EOR abs",
72        0x4E => "LSR abs",
73        0x50 => "BVC",
74        0x51 => "EOR (zp),Y",
75        0x52 => "EOR (zp)",
76        0x53 => "TAM",
77        0x54 => "CSL",
78        0x55 => "EOR zp,X",
79        0x56 => "LSR zp,X",
80        0x58 => "CLI",
81        0x59 => "EOR abs,Y",
82        0x5A => "PHY",
83        0x5D => "EOR abs,X",
84        0x5E => "LSR abs,X",
85        0x60 => "RTS",
86        0x61 => "ADC (zp,X)",
87        0x62 => "CLA",
88        0x64 => "STZ zp",
89        0x65 => "ADC zp",
90        0x66 => "ROR zp",
91        0x68 => "PLA",
92        0x69 => "ADC #imm",
93        0x6A => "ROR A",
94        0x6C => "JMP (abs)",
95        0x6D => "ADC abs",
96        0x6E => "ROR abs",
97        0x70 => "BVS",
98        0x71 => "ADC (zp),Y",
99        0x72 => "ADC (zp)",
100        0x73 => "TII",
101        0x74 => "STZ zp,X",
102        0x75 => "ADC zp,X",
103        0x76 => "ROR zp,X",
104        0x78 => "SEI",
105        0x79 => "ADC abs,Y",
106        0x7A => "PLY",
107        0x7C => "JMP (abs,X)",
108        0x7D => "ADC abs,X",
109        0x7E => "ROR abs,X",
110        0x80 => "BRA",
111        0x81 => "STA (zp,X)",
112        0x82 => "CLX",
113        0x83 => "TST zp",
114        0x84 => "STY zp",
115        0x85 => "STA zp",
116        0x86 => "STX zp",
117        0x87 | 0x97 | 0xA7 | 0xB7 | 0xC7 | 0xD7 | 0xE7 | 0xF7 => {
118            ["SMB0", "SMB1", "SMB2", "SMB3", "SMB4", "SMB5", "SMB6", "SMB7"]
119                [((opcode >> 4) & 7) as usize]
120        }
121        0x88 => "DEY",
122        0x89 => "BIT #imm",
123        0x8A => "TXA",
124        0x8C => "STY abs",
125        0x8D => "STA abs",
126        0x8E => "STX abs",
127        0x8F | 0x9F | 0xAF | 0xBF | 0xCF | 0xDF | 0xEF | 0xFF => {
128            ["BBS0", "BBS1", "BBS2", "BBS3", "BBS4", "BBS5", "BBS6", "BBS7"]
129                [((opcode >> 4) & 7) as usize]
130        }
131        0x90 => "BCC",
132        0x91 => "STA (zp),Y",
133        0x92 => "STA (zp)",
134        0x93 => "TST abs",
135        0x94 => "STY zp,X",
136        0x95 => "STA zp,X",
137        0x96 => "STX zp,Y",
138        0x98 => "TYA",
139        0x99 => "STA abs,Y",
140        0x9A => "TXS",
141        0x9C => "STZ abs",
142        0x9D => "STA abs,X",
143        0x9E => "STZ abs,X",
144        0xA0 => "LDY #imm",
145        0xA1 => "LDA (zp,X)",
146        0xA2 => "LDX #imm",
147        0xA3 => "TST zp,X",
148        0xA4 => "LDY zp",
149        0xA5 => "LDA zp",
150        0xA6 => "LDX zp",
151        0xA8 => "TAY",
152        0xA9 => "LDA #imm",
153        0xAA => "TAX",
154        0xAC => "LDY abs",
155        0xAD => "LDA abs",
156        0xAE => "LDX abs",
157        0xB0 => "BCS",
158        0xB1 => "LDA (zp),Y",
159        0xB2 => "LDA (zp)",
160        0xB3 => "TST abs,X",
161        0xB4 => "LDY zp,X",
162        0xB5 => "LDA zp,X",
163        0xB6 => "LDX zp,Y",
164        0xB8 => "CLV",
165        0xB9 => "LDA abs,Y",
166        0xBA => "TSX",
167        0xBC => "LDY abs,X",
168        0xBD => "LDA abs,X",
169        0xBE => "LDX abs,Y",
170        0xC0 => "CPY #imm",
171        0xC1 => "CMP (zp,X)",
172        0xC2 => "CLY",
173        0xC3 => "TDD",
174        0xC4 => "CPY zp",
175        0xC5 => "CMP zp",
176        0xC6 => "DEC zp",
177        0xC8 => "INY",
178        0xC9 => "CMP #imm",
179        0xCA => "DEX",
180        0xCC => "CPY abs",
181        0xCD => "CMP abs",
182        0xCE => "DEC abs",
183        0xD0 => "BNE",
184        0xD1 => "CMP (zp),Y",
185        0xD2 => "CMP (zp)",
186        0xD3 => "TIN",
187        0xD4 => "CSH",
188        0xD5 => "CMP zp,X",
189        0xD6 => "DEC zp,X",
190        0xD8 => "CLD",
191        0xD9 => "CMP abs,Y",
192        0xDA => "PHX",
193        0xDD => "CMP abs,X",
194        0xDE => "DEC abs,X",
195        0xE0 => "CPX #imm",
196        0xE1 => "SBC (zp,X)",
197        0xE3 => "TIA",
198        0xE4 => "CPX zp",
199        0xE5 => "SBC zp",
200        0xE6 => "INC zp",
201        0xE8 => "INX",
202        0xE9 => "SBC #imm",
203        0xEA => "NOP",
204        0xEC => "CPX abs",
205        0xED => "SBC abs",
206        0xEE => "INC abs",
207        0xF0 => "BEQ",
208        0xF1 => "SBC (zp),Y",
209        0xF2 => "SBC (zp)",
210        0xF3 => "TAI",
211        0xF4 => "SET",
212        0xF5 => "SBC zp,X",
213        0xF6 => "INC zp,X",
214        0xF8 => "SED",
215        0xF9 => "SBC abs,Y",
216        0xFA => "PLX",
217        0xFD => "SBC abs,X",
218        0xFE => "INC abs,X",
219        0x0B | 0x1B | 0x2B | 0x33 | 0x3B | 0x4B | 0x5B | 0x5C | 0x63 | 0x6B | 0x7B | 0x8B
220        | 0x9B | 0xAB | 0xBB | 0xCB | 0xDB | 0xDC | 0xE2 | 0xEB | 0xFB | 0xFC => "ILLEGAL",
221    }
222}