1use super::*;
2use test_log::test;
3
4macro_rules! test_op {
5    ($chip:expr, read expect=$sda:literal) => {
6        assert_eq!(
7            $sda != 0,
8            $chip.handle_read(),
9            "Expected SDA {}, got {}",
10            $sda,
11            u8::from($chip.handle_read())
12        );
13    };
14    ($chip:expr, write sda=$sda:literal scl=$scl:literal) => {
15        $chip.handle_dual_write($sda != 0, $scl != 0);
16    };
17}
18
19macro_rules! run_test {
20    ($chip:expr, [$(($($t:tt)* $(,)?)),* $(,)?]) => {
21        $(
22            test_op!($chip, $($t)*);
23        )*
24    };
25}
26
27// Reads in the same style as Wonder Boy in Monster World
28#[test]
29fn x24c01_basic_read() {
30    let mut bytes = vec![0_u8; 128];
31    bytes[0] = 0b0110_1001;
32    bytes[1] = 0b1100_0011;
33    let mut x24c01 = X24C01Chip::new(Some(&bytes));
34
35    run_test!(x24c01, [
36        // Initialize to standby
37        (write sda=1 scl=1),
38        (write sda=0 scl=1),
39        // Send address
40        (write sda=0 scl=0),
41        (write sda=0 scl=0),
42        (write sda=0 scl=0),
43        (write sda=0 scl=1),
44        (write sda=0 scl=0),
45        (write sda=0 scl=0),
46        (write sda=0 scl=1),
47        (write sda=0 scl=0),
48        (write sda=0 scl=0),
49        (write sda=0 scl=1),
50        (write sda=0 scl=0),
51        (write sda=0 scl=0),
52        (write sda=0 scl=1),
53        (write sda=0 scl=0),
54        (write sda=0 scl=0),
55        (write sda=0 scl=1),
56        (write sda=0 scl=0),
57        (write sda=0 scl=0),
58        (write sda=0 scl=1),
59        (write sda=0 scl=0),
60        (write sda=0 scl=0),
61        (write sda=0 scl=1),
62        (write sda=0 scl=0),
63        (write sda=1 scl=0),
64        (write sda=1 scl=1),
65        (write sda=1 scl=0),
66        (write sda=1 scl=0),
67        (write sda=1 scl=1),
68        // Address ACK
69        (read expect=0),
70        // Send data at address 0
71        (write sda=1 scl=0),
72        (write sda=1 scl=1),
73        (read expect=0),
74        (write sda=1 scl=0),
75        (write sda=1 scl=1),
76        (read expect=1),
77        (write sda=1 scl=0),
78        (write sda=1 scl=1),
79        (read expect=1),
80        (write sda=1 scl=0),
81        (write sda=1 scl=1),
82        (read expect=0),
83        (write sda=1 scl=0),
84        (write sda=1 scl=1),
85        (read expect=1),
86        (write sda=1 scl=0),
87        (write sda=1 scl=1),
88        (read expect=0),
89        (write sda=1 scl=0),
90        (write sda=1 scl=1),
91        (read expect=0),
92        (write sda=1 scl=0),
93        (write sda=1 scl=1),
94        (read expect=1),
95        (write sda=1 scl=0),
96        (write sda=0 scl=0),
97        (write sda=0 scl=1),
98        (write sda=0 scl=0),
99        // Send data at address 1
100        (write sda=1 scl=0),
101        (write sda=1 scl=1),
102        (read expect=1),
103        (write sda=1 scl=0),
104        (write sda=1 scl=1),
105        (read expect=1),
106        (write sda=1 scl=0),
107        (write sda=1 scl=1),
108        (read expect=0),
109        (write sda=1 scl=0),
110        (write sda=1 scl=1),
111        (read expect=0),
112        (write sda=1 scl=0),
113        (write sda=1 scl=1),
114        (read expect=0),
115        (write sda=1 scl=0),
116        (write sda=1 scl=1),
117        (read expect=0),
118        (write sda=1 scl=0),
119        (write sda=1 scl=1),
120        (read expect=1),
121        (write sda=1 scl=0),
122        (write sda=1 scl=1),
123        (read expect=1),
124    ]);
125}
126
127// Writes in the same style as Wonder Boy in Monster World
128#[test]
129fn x24c01_basic_write() {
130    let mut x24c01 = X24C01Chip::new(None);
131
132    run_test!(x24c01, [
133        (write sda=1 scl=1),
134        (write sda=0 scl=1),
135        (write sda=0 scl=0),
136
137        // Send address (2)
138        (write sda=0 scl=0),
139        (write sda=0 scl=1),
140        (write sda=0 scl=0),
141
142        (write sda=0 scl=0),
143        (write sda=0 scl=1),
144        (write sda=0 scl=0),
145
146        (write sda=0 scl=0),
147        (write sda=0 scl=1),
148        (write sda=0 scl=0),
149
150        (write sda=0 scl=0),
151        (write sda=0 scl=1),
152        (write sda=0 scl=0),
153
154        (write sda=0 scl=0),
155        (write sda=0 scl=1),
156        (write sda=0 scl=0),
157
158        (write sda=1 scl=0),
159        (write sda=1 scl=1),
160        (write sda=1 scl=0),
161
162        (write sda=0 scl=0),
163        (write sda=0 scl=1),
164        (write sda=0 scl=0),
165
166        (write sda=0 scl=0),
167        (write sda=0 scl=1),
168        (write sda=0 scl=0),
169
170        // Address ACK
171        (write sda=1 scl=0),
172        (write sda=1 scl=1),
173        (read expect=0),
174        (write sda=1 scl=0),
175
176        // Send data (1100 0011)
177        (write sda=1 scl=0),
178        (write sda=1 scl=1),
179        (write sda=1 scl=0),
180
181        (write sda=1 scl=0),
182        (write sda=1 scl=1),
183        (write sda=1 scl=0),
184
185        (write sda=0 scl=0),
186        (write sda=0 scl=1),
187        (write sda=0 scl=0),
188
189        (write sda=0 scl=0),
190        (write sda=0 scl=1),
191        (write sda=0 scl=0),
192
193        (write sda=0 scl=0),
194        (write sda=0 scl=1),
195        (write sda=0 scl=0),
196
197        (write sda=0 scl=0),
198        (write sda=0 scl=1),
199        (write sda=0 scl=0),
200
201        (write sda=1 scl=0),
202        (write sda=1 scl=1),
203        (write sda=1 scl=0),
204
205        (write sda=1 scl=0),
206        (write sda=1 scl=1),
207        (write sda=1 scl=0),
208
209        // Write ACK
210        (write sda=1 scl=0),
211        (write sda=1 scl=1),
212        (read expect=0),
213        (write sda=1 scl=0),
214
215        // Send data (1001 0110)
216        (write sda=1 scl=0),
217        (write sda=1 scl=1),
218        (write sda=1 scl=0),
219
220        (write sda=0 scl=0),
221        (write sda=0 scl=1),
222        (write sda=0 scl=0),
223
224        (write sda=0 scl=0),
225        (write sda=0 scl=1),
226        (write sda=0 scl=0),
227
228        (write sda=1 scl=0),
229        (write sda=1 scl=1),
230        (write sda=1 scl=0),
231
232        (write sda=0 scl=0),
233        (write sda=0 scl=1),
234        (write sda=0 scl=0),
235
236        (write sda=1 scl=0),
237        (write sda=1 scl=1),
238        (write sda=1 scl=0),
239
240        (write sda=1 scl=0),
241        (write sda=1 scl=1),
242        (write sda=1 scl=0),
243
244        (write sda=0 scl=0),
245        (write sda=0 scl=1),
246        (write sda=0 scl=0),
247
248        // Write ACK
249        (write sda=1 scl=0),
250        (write sda=1 scl=1),
251        (read expect=0),
252        (write sda=1 scl=0),
253    ]);
254
255    let memory = x24c01.get_memory();
256    assert_eq!(memory[2], 0b1100_0011, "byte at address 6");
257    assert_eq!(memory[3], 0b1001_0110, "byte at address 7");
258}
259
260// Reads in the same style as NBA Jam
261#[test]
262fn x24c02_read_dual() {
263    let mut bytes = vec![0_u8; 256];
264    bytes[6] = 0b0110_1001;
265    bytes[7] = 0b1100_0011;
266    let mut x24c02 = X24C02Chip::new(Some(&bytes));
267
268    run_test!(x24c02, [
269        (write sda=1 scl=0),
270        (write sda=1 scl=1),
271        (write sda=0 scl=1),
272        (write sda=0 scl=0),
273
274        // Send device address
275        (write sda=1 scl=0),
276        (write sda=1 scl=1),
277        (write sda=1 scl=0),
278
279        (write sda=0 scl=0),
280        (write sda=0 scl=1),
281        (write sda=0 scl=0),
282
283        (write sda=1 scl=0),
284        (write sda=1 scl=1),
285        (write sda=1 scl=0),
286
287        (write sda=0 scl=0),
288        (write sda=0 scl=1),
289        (write sda=0 scl=0),
290
291        (write sda=0 scl=0),
292        (write sda=0 scl=1),
293        (write sda=0 scl=0),
294
295        (write sda=0 scl=0),
296        (write sda=0 scl=1),
297        (write sda=0 scl=0),
298
299        (write sda=0 scl=0),
300        (write sda=0 scl=1),
301        (write sda=0 scl=0),
302
303        (write sda=0 scl=0),
304        (write sda=0 scl=1),
305        (write sda=0 scl=0),
306
307        // Device address ACK
308        (write sda=1 scl=0),
309        (read expect=0),
310        (write sda=1 scl=1),
311
312        // Send write address
313        (write sda=0 scl=0),
314        (write sda=0 scl=1),
315        (write sda=0 scl=0),
316
317        (write sda=0 scl=0),
318        (write sda=0 scl=1),
319        (write sda=0 scl=0),
320
321        (write sda=0 scl=0),
322        (write sda=0 scl=1),
323        (write sda=0 scl=0),
324
325        (write sda=0 scl=0),
326        (write sda=0 scl=1),
327        (write sda=0 scl=0),
328
329        (write sda=0 scl=0),
330        (write sda=0 scl=1),
331        (write sda=0 scl=0),
332
333        (write sda=1 scl=0),
334        (write sda=1 scl=1),
335        (write sda=1 scl=0),
336
337        (write sda=1 scl=0),
338        (write sda=1 scl=1),
339        (write sda=1 scl=0),
340
341        (write sda=0 scl=0),
342        (write sda=0 scl=1),
343        (write sda=0 scl=0),
344
345        // Write address ACK
346        (write sda=1 scl=0),
347        (read expect=0),
348        (write sda=1 scl=1),
349
350        // Restart
351        (write sda=1 scl=0),
352        (write sda=1 scl=1),
353        (write sda=0 scl=1),
354        (write sda=0 scl=0),
355
356        // Send device address (again), but with R flag set
357        (write sda=1 scl=0),
358        (write sda=1 scl=1),
359        (write sda=1 scl=0),
360
361        (write sda=0 scl=0),
362        (write sda=0 scl=1),
363        (write sda=0 scl=0),
364
365        (write sda=1 scl=0),
366        (write sda=1 scl=1),
367        (write sda=1 scl=0),
368
369        (write sda=0 scl=0),
370        (write sda=0 scl=1),
371        (write sda=0 scl=0),
372
373        (write sda=0 scl=0),
374        (write sda=0 scl=1),
375        (write sda=0 scl=0),
376
377        (write sda=0 scl=0),
378        (write sda=0 scl=1),
379        (write sda=0 scl=0),
380
381        (write sda=0 scl=0),
382        (write sda=0 scl=1),
383        (write sda=0 scl=0),
384
385        (write sda=1 scl=0),
386        (write sda=1 scl=1),
387        (write sda=1 scl=0),
388
389        // Device address ACK
390        (write sda=1 scl=0),
391        (read expect=0),
392
393        // Read data (0110 1001)
394        (write sda=1 scl=1),
395        (write sda=1 scl=0),
396        (read expect=0),
397
398        (write sda=1 scl=1),
399        (write sda=1 scl=0),
400        (read expect=1),
401
402        (write sda=1 scl=1),
403        (write sda=1 scl=0),
404        (read expect=1),
405
406        (write sda=1 scl=1),
407        (write sda=1 scl=0),
408        (read expect=0),
409
410        (write sda=1 scl=1),
411        (write sda=1 scl=0),
412        (read expect=1),
413
414        (write sda=1 scl=1),
415        (write sda=1 scl=0),
416        (read expect=0),
417
418        (write sda=1 scl=1),
419        (write sda=1 scl=0),
420        (read expect=0),
421
422        (write sda=1 scl=1),
423        (write sda=1 scl=0),
424        (read expect=1),
425
426        // Begin next send
427        (write sda=1 scl=1),
428        (write sda=1 scl=0),
429        (write sda=0 scl=0),
430
431        // Read data (1100 0011)
432        (write sda=0 scl=1),
433        (write sda=1 scl=0),
434        (read expect=1),
435
436        (write sda=1 scl=1),
437        (write sda=1 scl=0),
438        (read expect=1),
439
440        (write sda=1 scl=1),
441        (write sda=1 scl=0),
442        (read expect=0),
443
444        (write sda=1 scl=1),
445        (write sda=1 scl=0),
446        (read expect=0),
447
448        (write sda=1 scl=1),
449        (write sda=1 scl=0),
450        (read expect=0),
451
452        (write sda=1 scl=1),
453        (write sda=1 scl=0),
454        (read expect=0),
455
456        (write sda=1 scl=1),
457        (write sda=1 scl=0),
458        (read expect=1),
459
460        (write sda=1 scl=1),
461        (write sda=1 scl=0),
462        (read expect=1),
463    ]);
464}
465
466// NBA Jam Tournament Edition and NFL Quarterback Club do this on startup, seemingly to test
467// that the EEPROM chip is present?
468#[test]
469fn x24c02_toggle_read_while_stopped() {
470    let mut x24c02 = X24C02Chip::new(None);
471
472    run_test!(x24c02, [
473        (write sda=0 scl=0),
474        (write sda=1 scl=0),
475        (write sda=0 scl=0),
476        (write sda=0 scl=1),
477        (write sda=1 scl=1),
478        (write sda=1 scl=0),
479        (write sda=0 scl=0),
480        (write sda=0 scl=1),
481        (write sda=1 scl=1),
482        (write sda=1 scl=0),
483        (write sda=1 scl=0),
484        (read expect=1),
485        (write sda=0 scl=0),
486        (read expect=0),
487        (write sda=1 scl=0),
488        (read expect=1),
489        (write sda=0 scl=0),
490        (read expect=0),
491        (write sda=1 scl=0),
492        (read expect=1),
493    ]);
494}
495
496// Reads in the style of NFL Quarterback Club
497#[test]
498fn x24c08_read_individual() {
499    let mut bytes = vec![0_u8; 1024];
500    bytes[512 + 6] = 0b1100_0011;
501    bytes[512 + 7] = 0b0110_1001;
502    let mut x24c08 = X24C08Chip::new(Some(&bytes));
503
504    run_test!(x24c08, [
505        // Initialize
506        (write sda=0 scl=0),
507        (write sda=0 scl=1),
508        (write sda=1 scl=1),
509        (write sda=1 scl=0),
510        (write sda=1 scl=1),
511        (write sda=0 scl=1),
512        (write sda=0 scl=0),
513
514        // Send device address
515        (write sda=1 scl=0),
516        (write sda=1 scl=1),
517        (write sda=1 scl=0),
518
519        (write sda=0 scl=0),
520        (write sda=0 scl=1),
521        (write sda=0 scl=0),
522
523        (write sda=1 scl=0),
524        (write sda=1 scl=1),
525        (write sda=1 scl=0),
526
527        (write sda=0 scl=0),
528        (write sda=0 scl=1),
529        (write sda=0 scl=0),
530
531        (write sda=0 scl=0),
532        (write sda=0 scl=1),
533        (write sda=0 scl=0),
534
535        (write sda=0 scl=0),
536        (write sda=0 scl=1),
537        (write sda=0 scl=0),
538
539        (write sda=0 scl=0),
540        (write sda=0 scl=1),
541        (write sda=0 scl=0),
542
543        (write sda=0 scl=0),
544        (write sda=0 scl=1),
545        (write sda=0 scl=0),
546
547        // Device address ACK
548        (write sda=1 scl=0),
549        (write sda=1 scl=1),
550        (read expect=0),
551        (write sda=1 scl=0),
552
553        // Send write address
554        (write sda=0 scl=0),
555        (write sda=0 scl=1),
556        (write sda=0 scl=0),
557
558        (write sda=0 scl=0),
559        (write sda=0 scl=1),
560        (write sda=0 scl=0),
561
562        (write sda=0 scl=0),
563        (write sda=0 scl=1),
564        (write sda=0 scl=0),
565
566        (write sda=0 scl=0),
567        (write sda=0 scl=1),
568        (write sda=0 scl=0),
569
570        (write sda=0 scl=0),
571        (write sda=0 scl=1),
572        (write sda=0 scl=0),
573
574        (write sda=1 scl=0),
575        (write sda=1 scl=1),
576        (write sda=1 scl=0),
577
578        (write sda=1 scl=0),
579        (write sda=1 scl=1),
580        (write sda=1 scl=0),
581
582        (write sda=0 scl=0),
583        (write sda=0 scl=1),
584        (write sda=0 scl=0),
585
586        // Write address ACK
587        (write sda=1 scl=0),
588        (write sda=1 scl=1),
589        (read expect=0),
590        (write sda=1 scl=0),
591
592        // Restart
593        (write sda=1 scl=0),
594        (write sda=1 scl=1),
595        (write sda=0 scl=1),
596        (write sda=0 scl=0),
597
598        // Send device address (again), with R flag and A9 set
599        (write sda=1 scl=0),
600        (write sda=1 scl=1),
601        (write sda=1 scl=0),
602
603        (write sda=0 scl=0),
604        (write sda=0 scl=1),
605        (write sda=0 scl=0),
606
607        (write sda=1 scl=0),
608        (write sda=1 scl=1),
609        (write sda=1 scl=0),
610
611        (write sda=0 scl=0),
612        (write sda=0 scl=1),
613        (write sda=0 scl=0),
614
615        (write sda=0 scl=0),
616        (write sda=0 scl=1),
617        (write sda=0 scl=0),
618
619        (write sda=1 scl=0),
620        (write sda=1 scl=1),
621        (write sda=1 scl=0),
622
623        (write sda=0 scl=0),
624        (write sda=0 scl=1),
625        (write sda=0 scl=0),
626
627        (write sda=1 scl=0),
628        (write sda=1 scl=1),
629        (write sda=1 scl=0),
630
631        // Device address ACK
632        (write sda=1 scl=0),
633        (write sda=1 scl=1),
634        (read expect=0),
635        (write sda=1 scl=0),
636
637        // Read data at address (1100 0011)
638        (write sda=1 scl=0),
639        (write sda=1 scl=1),
640        (read expect=1),
641
642        (write sda=1 scl=0),
643        (write sda=1 scl=1),
644        (read expect=1),
645
646        (write sda=1 scl=0),
647        (write sda=1 scl=1),
648        (read expect=0),
649
650        (write sda=1 scl=0),
651        (write sda=1 scl=1),
652        (read expect=0),
653
654        (write sda=1 scl=0),
655        (write sda=1 scl=1),
656        (read expect=0),
657
658        (write sda=1 scl=0),
659        (write sda=1 scl=1),
660        (read expect=0),
661
662        (write sda=1 scl=0),
663        (write sda=1 scl=1),
664        (read expect=1),
665
666        (write sda=1 scl=0),
667        (write sda=1 scl=1),
668        (read expect=1),
669    ]);
670}